According to the industry as a whole, Professor Kim Sang-Sig and his research team have developed a surefire way to reduce the size of semiconductor devices while keeping their current capabilities. A notable trait of this development is that it also enables Complementary Metal Oxide (CMOS) processing, a system of sending electronic signals inside the semiconductor, named such for resembling the function of the neuron cell. 

CMOS processing traditionally used two different types of structure: an n-channel structure of Negative-Positive-Negative (NPN) and the p structure Positive-Negative-Positive (PNP). Professor Kim’s team altered this current technology into the yet unnamed PNPN structure. Professor Kim stated that this structure allows for the implementation of dozens of CMOS circuits as a singular device. This simplified method allows for the conservation of energy as well, making this structure highly efficient compared to the current technology. 

This landslide creation has been published in many local and international publications such as IEEE Electron Device Letters, a journal of the International Association of Technologists (IEEE).